Asic Design Engineer Jobs in Mountain View, CA (150)
Senior ASIC RTL Designer
Triple Crown
Santa Clara County, CA
401(k)
Dental Insurance
Vision Insurance
Sr Physical Design Engineer (GF 12LP) - 100% remote
Encore Semi
🌎 Remote
New
Remote
401(k)
PTO
Education
$135k - $165k / year
ASIC/SOC Silicon Physical Design Engineer
MatX
Mountain View, CA
401(k)
PTO
Vision Insurance
Parental Leave
$160k - $275k / year
ASIC Engineer, Design
Meta Platforms
Sunnyvale, CA
ASIC Design Engineer
Apple
Santa Clara, CA
Eco-Friendly
Dental Insurance
$150.4k - $277.6k / year
Principal ASIC Design Engineer
Hewlett Packard Enterprise
Sunnyvale, CA
Eco-Friendly
‌
ASIC Design Engineer 2
Hewlett Packard Enterprise Development LP
Sunnyvale, CA
New
‌
Senior ASIC Design Engineer
NVIDIA
Santa Clara, CA
‌
ASIC Design Engineer 2
Hewlett Packard Enterprise
Sunnyvale, CA
Eco-Friendly
‌
ASIC Engineer, Design Verification
META
Sunnyvale, CA
$146k / year
‌
ASIC Design Engineer II
Ambarella
Santa Clara, CA
New
$130k / year
‌
ASIC Design Engineer Pixel IP
Apple
Sunnyvale, CA
New
Eco-Friendly
Dental Insurance
$129.3k - $194.7k / year
‌
Senior ASIC Floorplan Design Engineer
NVIDIA
Santa Clara, CA
New
‌
ASIC Design Engineer (Hardware Security)
Qualcomm
Santa Clara, CA
New
$145.6k - $218.4k / year
‌
ASIC RTL/SoC Design Engineer
TetraMem - Accelerate The World
San Jose, CA
$110k - $300k / year
‌
ASIC Design Engineer Technical Lead
Cisco
San Jose, CA
Diversity Leader
Eco-Friendly
Dental Insurance
Vision Insurance
Parental Leave
$186.9k - $307.8k / year
‌
ASIC Design Engineer Technical Lead
Outshift by Cisco
San Jose, CA
New
Dental Insurance
Vision Insurance
Parental Leave
$186.9k - $307.8k / year
‌
Engineer II - Digital ASIC Design
Microchip Technology
San Jose, CA
New
$70.3k - $143k / year
‌
ASIC & FPGA Design Engineer Sr - E3
Lockheed Martin
Sunnyvale, CA
Eco-Friendly
PTO
Dental Insurance
Vision Insurance
Parental Leave
$122.6k - $227.6k / year
‌
Senior ASIC (Front-End) Design Engineer
Ethernovia
San Jose, CA
New
Part-Time
Dental Insurance
Vision Insurance
Flexible Schedule
$200k - $300k / year
‌
ASIC Design Engineer - New College Grad 2027
NVIDIA
Santa Clara, CA
New
‌
ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal
Celero Communications
San Jose, CA
$150k - $250k / year
‌
ASIC/FPGA Design Engineer IV, TS/SCI Clearance
Lockheed Martin
Sunnyvale, CA
Eco-Friendly
‌
Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs
Amazon
Cupertino, CA
Eco-Friendly
Health Insurance
Dental Insurance
Vision Insurance
Parental Leave
‌
Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs
A W S
Cupertino, CA
Health Insurance
Dental Insurance
Vision Insurance
Parental Leave
‌
ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs
Amazon
Cupertino, CA
New
Hospitality
Eco-Friendly
Health Insurance
Dental Insurance
Vision Insurance
Parental Leave
‌
ASIC Engineer, Performance Architecture and Modeling
META
Sunnyvale, CA
$114k / year
‌
Physical Design Engineer
Qualcomm
Santa Clara, CA
$190.2k - $285.4k / year
‌
FPGA Design/Verification Engineer - Active Clearance
Trispoke Managed Services Pvt Ltd
Sunnyvale, CA
New
Hourly
$100 / hour
‌
Distinguished Technologist, ASIC Design Architect
Hewlett Packard Enterprise
Sunnyvale, CA
New
Eco-Friendly
‌
ASIC & FPGA Design Engineering Asc Mgr - L4
Lockheed Martin
Sunnyvale, CA
New
Eco-Friendly
Dental Insurance
Vision Insurance
Parental Leave
$135.7k - $251.9k / year
‌
Senior Design Verification Engineer (remote position)
Correct Designs
🌎 Remote
Remote
Hourly
Job Description
Working as an Asic Design Engineer in Mountain View, CA
There are 150 Asic Design Engineer opportunities available in Mountain View, CA all with unique requirements.
An ASIC (Application Specific Integrated Circuit) Design Engineer designs functional blocks of an integrated circuit and works with the specified design rules to ensure compliance with the customer requirements. An ASIC Design Engineer may also be called upon to help a company manage the design of new circuits based on specifications for a particular class of circuit or technology.
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